The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 07, 2023

Filed:

May. 03, 2019
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Pedro Augusto Borrego Lambin Torres Amaral, Villach, AT;

Ewa Brox-Napieralska, Munich, DE;

Bernd Goller, Otterfing, DE;

Andreas Wiesbauer, Poertschach, AT;

Assignee:

INFINEON TECHNOLOGIES AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/66 (2006.01); H01L 23/552 (2006.01); H01L 23/48 (2006.01); H01L 23/00 (2006.01); H01Q 1/22 (2006.01); H01Q 1/38 (2006.01); B81B 7/00 (2006.01); H01L 23/06 (2006.01); H01L 23/20 (2006.01); H01L 21/48 (2006.01); H01L 23/053 (2006.01);
U.S. Cl.
CPC ...
H01L 23/66 (2013.01); B81B 7/0064 (2013.01); H01L 21/4817 (2013.01); H01L 23/053 (2013.01); H01L 23/06 (2013.01); H01L 23/20 (2013.01); H01L 23/48 (2013.01); H01L 23/552 (2013.01); H01L 24/03 (2013.01); H01Q 1/2283 (2013.01); H01Q 1/38 (2013.01); H01L 24/16 (2013.01); H01L 24/27 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/83 (2013.01); H01L 24/92 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/2732 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48137 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/83192 (2013.01); H01L 2224/83851 (2013.01); H01L 2224/92247 (2013.01); H01L 2924/1433 (2013.01); H01L 2924/1461 (2013.01); H01L 2924/15151 (2013.01); H01L 2924/16152 (2013.01); H01L 2924/16196 (2013.01); H01L 2924/16251 (2013.01); H01L 2924/3025 (2013.01);
Abstract

A device package includes a semiconductor device. The semiconductor device is disposed on a substrate. The device package further includes a covering. The covering is disposed on the substrate and surrounds the semiconductor device. The covering includes a void, a first layer, and a second layer. The void is between an interior surface of the covering and the semiconductor device. The first layer has a first electrical conductivity and a first thickness. The second layer is disposed under the first layer. The second layer has a second electrical conductivity and a second thickness. The first electrical conductivity is greater than the second electrical conductivity. The first thickness is less than the second thickness.


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