The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 31, 2023

Filed:

Nov. 23, 2020
Applicant:

Alpha and Omega Semiconductor (Cayman) Ltd., Grand Cayman, KY;

Inventors:

Wenjun Li, Portland, OR (US);

Lingbing Chen, Portland, OR (US);

Lingpeng Guan, San Jose, CA (US);

Jian Wang, Portland, OR (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 21/223 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0634 (2013.01); H01L 29/0653 (2013.01); H01L 29/66712 (2013.01); H01L 29/7811 (2013.01); H01L 21/223 (2013.01);
Abstract

A method for manufacturing and a Super Junction MOSFET are disclosed. The Super Junction MOSFET comprises a lightly doped epitaxial layer of a first conductivity type on a heavily doped substrate of the first conductivity type. A deep trench is formed in the epitaxial layer. The deep trench having an insulating layer with a thickness gradient formed on surfaces of the deep trench. One or more regions of the epitaxial layer proximate to sidewalls of the deep trench is doped of a second conductivity type, wherein the second conductivity type is opposite the first conductivity type. Finally, MOSFET device structures are formed in the epitaxial layer.


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