The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 31, 2023

Filed:

Jun. 08, 2017
Applicant:

Agency for Science, Technology and Research, Singapore, SG;

Inventors:

Ka Fai Chang, Singapore, SG;

Yong Han, Singapore, SG;

David Soon Wee Ho, Singapore, SG;

Ying Ying Lim, Singapore, SG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/367 (2006.01); H01L 23/31 (2006.01); H01L 23/42 (2006.01); H01L 23/498 (2006.01); H01L 23/66 (2006.01); H01Q 1/22 (2006.01); H01L 23/64 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3672 (2013.01); H01L 23/3121 (2013.01); H01L 23/42 (2013.01); H01L 23/49816 (2013.01); H01L 23/49822 (2013.01); H01L 23/49827 (2013.01); H01L 23/66 (2013.01); H01Q 1/2283 (2013.01); H01L 23/642 (2013.01); H01L 23/645 (2013.01); H01L 2223/6677 (2013.01);
Abstract

Various embodiments may provide a semiconductor package. The semiconductor package may include a semiconductor chip, a first mold compound layer at least partially covering the semiconductor chip, and a redistribution layer over the first mold compound layer, the redistribution layer including one or more electrically conductive lines in electrical connection with the semiconductor chip. The semiconductor package may additionally include a second mold compound layer over the redistribution layer, and an antenna array over the second mold compound layer, the antenna array configured to be coupled to the one or more electrically conductive lines.


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