The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 24, 2023

Filed:

Oct. 01, 2019
Applicant:

Analog Devices International Unlimited Company, Limerick, IE;

Inventors:

Edward John Coyne, Athenry, IE;

Alan Brannick, Raheen, IE;

Shane Tooher, Kilmallock, IE;

Breandán Pol Og Ó hAnnaidh, Raheen, IE;

Catriona Marie O'Sullivan, Kilcornan, IE;

Shane Patrick Geary, Sixmilebridge, IE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/08 (2006.01); H01L 21/8228 (2006.01); H01L 27/082 (2006.01); H01L 29/66 (2006.01); H01L 29/732 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0804 (2013.01); H01L 21/82285 (2013.01); H01L 27/0826 (2013.01); H01L 29/0821 (2013.01); H01L 29/66272 (2013.01); H01L 29/732 (2013.01);
Abstract

A bipolar junction transistor is provided with an emitter structure that is positioned above the upper surface of the base region. The thickness of the emitter and the interfacial oxide thickness between the emitter and the base is configured to optimize a gain for a given type of transistor. A method of fabricating PNP and NPN transistors on the same substrate using a complementary bipolar fabrication process is provided. The method enables the emitter structure for the NPN transistor to be defined separately to that of the PNP transistor. This is achieved by epitaxially growing the emitter layer for the PNP transistor and growing the emitter layer for the NPN transistor in a thermal furnace.


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