The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 24, 2023

Filed:

Oct. 29, 2019
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Litao Yang, Boise, ID (US);

Srinivas Pulugurtha, Boise, ID (US);

Haitao Liu, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/108 (2006.01); H01L 27/06 (2006.01); H01L 21/8254 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10838 (2013.01); H01L 21/8254 (2013.01); H01L 27/0605 (2013.01); H01L 27/0629 (2013.01); H01L 27/10814 (2013.01); H01L 27/10855 (2013.01); H01L 27/10882 (2013.01); H01L 27/10888 (2013.01); H01L 29/1037 (2013.01);
Abstract

Some embodiments include an integrated assembly having an active region which contains semiconductor material. The active region includes first, second and third source/drain regions within the semiconductor material, includes a first channel region within the semiconductor material and between the first and second source/drain regions, and includes a second channel region within the semiconductor material and between the second and third source/drain regions. The semiconductor material includes at least one element selected from Group 13 of the periodic table. A digit line is electrically coupled with the second source/drain region. A first transistor gate is operatively proximate the first channel region. A second transistor gate is operatively proximate the second channel region. A first storage-element is electrically coupled with the first source/drain region. A second storage-element is electrically coupled with the third source/drain region. Some embodiments include methods of forming integrated assemblies.


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