The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 24, 2023

Filed:

May. 24, 2021
Applicant:

Rambus Inc., San Jose, CA (US);

Inventors:

Scott C. Best, Palo Alto, CA (US);

Frederick A. Ware, Los Altos Hills, CA (US);

William N. Ng, San Francisco, CA (US);

Assignee:

Rambus Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 5/04 (2006.01);
U.S. Cl.
CPC ...
G11C 7/1093 (2013.01); G11C 5/04 (2013.01); G11C 7/1003 (2013.01); G11C 7/1066 (2013.01);
Abstract

A memory module can be programmed to deliver relatively wide, low-latency data in a first access mode, or to sacrifice some latency in return for a narrower data width, a narrower command width, or both, in a second access mode. The narrow, higher-latency mode requires fewer connections and traces. A controller can therefore support more modules, and thus increased system capacity. Programmable modules thus allow computer manufacturers to strike a desired balance between memory latency, capacity, and cost.


Find Patent Forward Citations

Best, Scott. (2023). Memory module and system supporting parallel and serial access modes (U.S. Patent No. 11562778). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11562778

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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