The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 17, 2023

Filed:

Jan. 29, 2020
Applicant:

Nxp Usa, Inc., Austin, TX (US);

Inventors:

Joseph Gerard Schultz, Wheaton, IL (US);

Kevin Kim, Gilbert, AZ (US);

Assignee:

NXP USA, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/52 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 27/02 (2006.01); H01L 49/02 (2006.01); H01L 29/78 (2006.01); H03F 1/02 (2006.01); H03F 3/213 (2006.01);
U.S. Cl.
CPC ...
H03F 1/523 (2013.01); H01L 23/528 (2013.01); H01L 23/5223 (2013.01); H01L 23/5226 (2013.01); H01L 27/0255 (2013.01); H01L 28/60 (2013.01); H01L 29/7816 (2013.01); H03F 1/02 (2013.01); H03F 1/0288 (2013.01); H03F 3/213 (2013.01); H03F 2200/426 (2013.01); H03F 2200/444 (2013.01); H03F 2200/451 (2013.01);
Abstract

Integrated circuits, such as power amplifier integrated circuits, are disclosed containing compact-footprint, vertically-integrated capacitor-avalanche diode (AD) structures. In embodiments, the integrated circuit includes a semiconductor substrate, a metal layer system, and a vertically-integrated capacitor-AD structure. The metal layer system includes, in turn, a body of dielectric material in which a plurality of patterned metal layers are located. The vertically-integrated capacitor-AD structure includes a first AD formed, at least in part, by patterned portions of the first patterned metal layer. A first metal-insulator-metal (MIM) capacitor is also formed in the metal layer system and at least partially overlaps with the first AD, as taken along a vertical axis orthogonal to the principal surface of the semiconductor substrate. In certain instances, at least a majority, if not the entirety of the first AD vertically overlaps with the first MIM capacitor, by surface area, as taken along the vertical axis.


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