The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 10, 2023

Filed:

Jun. 28, 2019
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Aditya Katragada, Austin, TX (US);

Prashant Dewan, Portland, OR (US);

Karunakara Kotary, Portland, OR (US);

Vinupama Godavarthi, El Dorado Hills, CA (US);

Kumar Dwarakanath, Folsom, CA (US);

Alex Izbinsky, Mevasseret-Zion, IL;

Purushottam Goel, Beaverton, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/57 (2013.01); G06F 21/72 (2013.01); G06F 9/445 (2018.01);
U.S. Cl.
CPC ...
G06F 21/572 (2013.01); G06F 9/445 (2013.01); G06F 21/72 (2013.01); G06F 2221/033 (2013.01);
Abstract

There is disclosed in one example, a system-on-a-chip (SoC), including: a processor core; a fabric; an intellectual property (IP) block communicatively coupled to the processor core via the fabric, the IP block having a microcontroller configured to provide a microcontroller architecture; a firmware load interface configured to provide a standardized hardware interface to the microcontroller architecture, wherein the standardized hardware interface provides an architecture-agnostic mechanism to securely load a firmware to the intellectual property block; and logic to provide a loader to load a firmware to the IP block via the firmware load interface.


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