The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 03, 2023

Filed:

Jan. 09, 2020
Applicant:

Integrated Silicon Solution, (Cayman) Inc., Grand Cayman, KY;

Inventors:

Andrew J. Walker, Mountain View, CA (US);

Dafna Beery, Palo Alto, CA (US);

Peter Cuevas, Los Gatos, CA (US);

Amitay Levi, Cupertino, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/24 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 27/22 (2006.01);
U.S. Cl.
CPC ...
H01L 27/2454 (2013.01); H01L 27/228 (2013.01); H01L 29/66666 (2013.01); H01L 29/7827 (2013.01);
Abstract

A magnetic memory structure that includes a two-terminal resistive memory element electrically connected with a selector structure. The selector structure includes a semiconductor pillar structure formed on a semiconductor substrate. The selector structure is surrounded by a gate dielectric layer, and the semiconductor pillar structure and gate dielectric layer are surrounded by an electrically conductive gate structure. The semiconductor pillar has first and second dimensions in a plane parallel with the surface of the semiconductor substrate that are unequal with one another. The semiconductor pillar structure can have a cross-section parallel with the semiconductor substrate surface that is in the shape of a: rectangle; oval elongated polygon, etc. The length of the longer dimension can be adjusted to provide a desired amount of current though the semiconductor pillar structure to drive the two-terminal resistive memory element.


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