The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 03, 2023
Filed:
Aug. 27, 2019
Applicant:
Seagate Technology Llc, Cupertino, CA (US);
Inventors:
Zhengang Chen, San Jose, CA (US);
David Patmore, Los Altos Hills, CA (US);
Yingji Ju, Shanghai, CN;
Erich F. Haratsch, San Jose, CA (US);
Assignee:
Seagate Technology LLC, Fremont, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 29/42 (2006.01); G11C 29/44 (2006.01); G11C 29/36 (2006.01); H03M 13/11 (2006.01); H04L 1/00 (2006.01); G06F 11/00 (2006.01); G11C 7/10 (2006.01); G06F 3/06 (2006.01); G11C 11/56 (2006.01); G11C 29/52 (2006.01); G11C 16/10 (2006.01); G11C 16/00 (2006.01);
U.S. Cl.
CPC ...
G11C 29/42 (2013.01); G11C 29/36 (2013.01); G11C 29/44 (2013.01); H03M 13/1108 (2013.01); G06F 3/064 (2013.01); G06F 11/00 (2013.01); G11C 7/10 (2013.01); G11C 11/5628 (2013.01); G11C 16/00 (2013.01); G11C 16/10 (2013.01); G11C 29/52 (2013.01); H04L 1/00 (2013.01);
Abstract
An apparatus includes a memory and a controller. The memory may be configured to store data. The controller may be configured to process a plurality of input/output requests to a plurality of blocks of the memory that are not marked as bad on a block list, perform a code rate test that programs the plurality of blocks of the memory at three or more code rates of an error correction code scheme, and mark any of the plurality of blocks identified as bad during the code rate test on the block list.