The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2022

Filed:

May. 06, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;

Inventors:

Ruey-Bin Sheen, Taichung, TW;

Ming Hsien Tsai, New Taipei, TW;

Chih-Hsien Chang, New Taipei, TW;

Tsung-Hsien Tsai, Taoyuan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/14 (2014.01); H03K 5/131 (2014.01); H03K 5/135 (2006.01); G04F 10/00 (2006.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
H03K 5/14 (2013.01); G04F 10/005 (2013.01); H03K 5/131 (2013.01); H03K 5/135 (2013.01); H03K 2005/00058 (2013.01);
Abstract

Systems, methods, and devices are provided for a circuit for generating a pulse output having a controllable pulse width. Systems and methods may include a delay line having a plurality of stages. A delay per stage calculation circuit is configured to determine a per-stage delay of the delay line using a first clock input. A pulse generation circuit is configured to generate the pulse output using the delay line based on the per-stage delay using a second clock input, the second clock input having a lower frequency than the first clock input.


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