The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2022

Filed:

Jul. 08, 2020
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Ching-Wen Hung, Tainan, TW;

Chun-Hsien Lin, Tainan, TW;

Chien-Hung Chen, Taipei, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11 (2006.01); H01L 27/092 (2006.01); H01L 21/8238 (2006.01); H01L 29/08 (2006.01); H01L 29/417 (2006.01); H01L 21/285 (2006.01); H01L 29/45 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1104 (2013.01); H01L 21/28518 (2013.01); H01L 21/823814 (2013.01); H01L 21/823821 (2013.01); H01L 21/823871 (2013.01); H01L 27/0924 (2013.01); H01L 29/0847 (2013.01); H01L 29/41791 (2013.01); H01L 29/45 (2013.01);
Abstract

A method for fabricating a static random access memory (SRAM) includes the steps of: forming a gate structure on a substrate; forming an epitaxial layer adjacent to the gate structure; forming a first interlayer dielectric (ILD) layer around the gate structure; transforming the gate structure into a metal gate; forming a contact hole exposing the epitaxial layer, forming a barrier layer in the contact hole, forming a metal layer on the barrier layer, and then planarizing the metal layer and the barrier layer to form a contact plug. Preferably, a bottom portion of the barrier layer includes a titanium rich portion and a top portion of the barrier layer includes a nitrogen rich portion.


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