The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2022

Filed:

Jul. 31, 2020
Applicant:

Nxp Usa, Inc., Austin, TX (US);

Inventors:

Gary Robert Kerr, Glasgow, GB;

Sunny Gupta, Glasgow, GB;

Andrew Robertson, Glasgow, GB;

Assignee:

NXP USA, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4036 (2013.01);
Abstract

A system and method for controlling deadlock in a processing system includes asserting a deadlock condition indicator when a timer in a timer circuit has passed a predetermined period of time while a first bus master device occupies a port of a bus slave device, and an empty indicator indicates a second bus master is waiting to occupy the port of the bus slave device while the first bus master is occupying the port of the bus slave device. When the deadlock condition indicator is asserted, action can be taken by the processing system to eliminate the deadlock.


Find Patent Forward Citations

Kerr, Gary. (2022). Deadlock condition avoidance in a data processing system with a shared slave (U.S. Patent No. 11537545). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11537545

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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