The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 20, 2022
Filed:
Nov. 03, 2014
Applicant:
Texas Instruments Incorporated, Dallas, TX (US);
Inventors:
Assignee:
Texas Instruments Incorporated, Dallas, TX (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/532 (2006.01); H01L 23/485 (2006.01); H01L 21/768 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
H01L 23/53295 (2013.01); H01L 21/76801 (2013.01); H01L 21/76804 (2013.01); H01L 23/485 (2013.01); H01L 21/31111 (2013.01); H01L 21/76877 (2013.01); H01L 2924/0002 (2013.01);
Abstract
In a semiconductor process, a seamless tungsten plug is formed in an inter-layer dielectric by forming the inter-layer dielectric from multiple oxide layers having different wet etch rates, from lowest wet-etch rate for the lowest layer to highest wet-etch rate for the highest layer, forming a hole or trench in the inter-layer dielectric using a dry etch process, reconfiguring the hole or trench to have sloped side walls by performing a wet etch step, and filling the hole or trench with tungsten and etching back the tungsten to form a seamless tungsten plug.