The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 20, 2022

Filed:

Sep. 28, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Sang Yup Kim, Sunnyvale, CA (US);

Myung Jin Yim, San Jose, CA (US);

Woosung Kim, Mountain View, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02B 6/43 (2006.01); G02B 6/122 (2006.01); G02B 6/42 (2006.01); G02B 6/12 (2006.01);
U.S. Cl.
CPC ...
G02B 6/43 (2013.01); G02B 6/122 (2013.01); G02B 6/4212 (2013.01); G02B 6/4274 (2013.01); G02B 2006/12061 (2013.01);
Abstract

An interposer apparatus for co-packaging an electronic integrated circuit and a photonic integrated circuit may include a dielectric substrate; an optical waveguide disposed on the dielectric substrate to optically couple the photonic integrated circuit disposed on one side of the dielectric substrate with at least one of another photonic integrated circuit disposed on the dielectric substrate or an optical device disposed on the dielectric substrate; and a metal interconnect disposed through the dielectric substrate to electrically couple the photonic integrated circuit disposed on the one side of the dielectric substrate with an electronic integrated circuit disposed on the other side of the dielectric substrate.


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