The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 2022

Filed:

Nov. 16, 2020
Applicant:

Fu-chang Hsu, San Jose, CA (US);

Inventor:

Fu-Chang Hsu, San Jose, CA (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/24 (2006.01); H01L 27/22 (2006.01); H01L 45/00 (2006.01); G11C 13/00 (2006.01);
U.S. Cl.
CPC ...
H01L 27/249 (2013.01); G11C 13/0004 (2013.01); H01L 27/224 (2013.01); H01L 27/2409 (2013.01); H01L 45/1683 (2013.01); G11C 2213/71 (2013.01); G11C 2213/72 (2013.01); H01L 45/04 (2013.01); H01L 45/06 (2013.01); H01L 45/126 (2013.01); H01L 45/1226 (2013.01); H01L 45/146 (2013.01);
Abstract

Three-dimensional vertical memory array cell structures and processes. In an exemplary embodiment, a 3D vertical memory array structure is formed by performing operations that include forming an array stack having alternating metal layers and insulator layers, forming a hole through the array stack to expose internal surfaces of the metal layers and internal surfaces of the insulator layers, and performing a metal-oxidation process on the internal surfaces of the metal layers to form selector devices on the internal surfaces of the metal layers. The operations also include depositing one of resistive material or phase-change material within the hole on the selector devices and the internal surfaces of the insulator layers, such that the hole is reduced to a smaller hole, and depositing conductor material in the smaller hole.


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