The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 2022

Filed:

Dec. 31, 2020
Applicant:

Synopsys, Inc., Mountain View, CA (US);

Inventors:

Salvatore Amoroso, Glasgow, GB;

Victor Moroz, Mountain View, CA (US);

Assignee:

Synopsys, Inc., Mountain View, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11582 (2017.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 21/02532 (2013.01); H01L 21/02598 (2013.01); H01L 21/02667 (2013.01); H01L 21/02595 (2013.01);
Abstract

A method of forming a multitude of vertical NAND memory cells, includes, in part, forming a multitude of insulating materials on a silicon substrate, forming a trench in the insulating materials to expose a surface of the silicon substrate, depositing a layer of polysilicon along the sidewalls of the trench, filling the trench with oxide, forming a metal layer above the trench, and forming a mono-crystalline channel for the NAND memory cells by applying a voltage between the silicon substrate and the metal layer to cause the polysilicon sidewalls to melt. The melted polysilicon sidewalls is enable to recrystallize into the mono-crystalline channel.


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