The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 2022

Filed:

Jun. 02, 2021
Applicant:

Sandisk Technologies Llc, Addison, TX (US);

Inventors:

Hua-Ling Hsu, Fremont, CA (US);

Henry Chin, Fremont, CA (US);

Han-Ping Chen, San Jose, CA (US);

Erika Penzo, San Jose, CA (US);

Fanglin Zhang, Fremont, CA (US);

Assignee:

SanDisk Technologies LLC, Addison, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G11C 16/34 (2006.01); G11C 16/10 (2006.01); G11C 16/24 (2006.01); G11C 11/56 (2006.01); H01L 27/11565 (2017.01); G11C 16/26 (2006.01); H01L 27/11582 (2017.01);
U.S. Cl.
CPC ...
G11C 16/3459 (2013.01); G11C 11/5628 (2013.01); G11C 11/5671 (2013.01); G11C 16/0483 (2013.01); G11C 16/10 (2013.01); G11C 16/24 (2013.01); G11C 16/26 (2013.01); H01L 27/11565 (2013.01); H01L 27/11582 (2013.01);
Abstract

Apparatus and methods are described to program memory cells and control bit line discharge schemes during programming based on the data pattern. The memory controller can predict program data pattern based on SLC pulse number and TLC data completion signals and use these signals to adjust when the inhibited bit lines can discharge. Once a TLC program operation have more one data, the memory controller will enable EQVDDSA_PROG to equalize to VDDSA, and then discharge. In SLC program, the memory controller will enable EQVDDSA_PROG only in first program pulse and disable it thereafter.


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