The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 2022

Filed:

Jun. 25, 2019
Applicant:

Nxp Usa, Inc., Austin, TX (US);

Inventors:

Diviya Jain, New Delhi, IN;

Ashish Mathur, New Delhi, IN;

Assignee:

NXP USA, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06N 20/00 (2019.01); G06F 9/445 (2018.01);
U.S. Cl.
CPC ...
G06N 20/00 (2019.01); G06F 9/44505 (2013.01);
Abstract

A self-optimizing System-on-Chip (SOC) includes multiple cores, multiple hardware accelerators, multiple memories and an interconnect framework. The SOC also includes a machine learning (ML) module that uses data flow information to build a ML network dynamically and configures all the various hardware blocks autonomously, to achieve predetermined application performance targets. The SOC is able to recover from hangs caused when testing various configuration settings. The SOC also avoids configuration settings that cause severe drops in performance.


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