The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 2022

Filed:

Jun. 29, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Malini K. Bhandaru, San Jose, CA (US);

Iosif Gasparakis, Hillsboro, OR (US);

Sunku Ranganath, Beaverton, OR (US);

Liyong Qiao, Beijing, CN;

Rui Zang, Beijing, CN;

Dakshina Ilangovan, San Jose, CA (US);

Shaohe Feng, Beijing, CN;

Edwin Verplanke, Chandler, AZ (US);

Priya Autee, Chandler, AZ (US);

Lin A. Yang, San Diego, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/08 (2016.01); G06F 9/50 (2006.01); G06F 9/54 (2006.01); G06F 12/0806 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0806 (2013.01); G06F 9/5016 (2013.01); G06F 9/547 (2013.01);
Abstract

A holistic view of cache class of service (CLOS) to include an allocation of processor cache resources to a plurality of CLOS. The allocation of processor cache resources to include allocation of cache ways for an n-way set of associative cache. Examples include monitoring usage of the plurality of CLOS to determine processor cache resource usage and to report the processor cache resource usage.


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