The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 29, 2022

Filed:

Jun. 27, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Anuj Agrawal, San Jose, CA (US);

Chirag Bharat Thakkar, Milpitas, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 12/26 (2006.01); H04L 29/06 (2006.01); H04L 43/18 (2022.01); H04L 69/18 (2022.01); H04L 43/50 (2022.01); H04L 43/045 (2022.01);
U.S. Cl.
CPC ...
H04L 43/18 (2013.01); H04L 43/045 (2013.01); H04L 43/50 (2013.01); H04L 69/18 (2013.01);
Abstract

A Protocol Analyzer is provided for monitoring and debugging a high-speed communications link between a local device and a remote device. The local device may include a communications protocol block for interfacing with the remote device. The Protocol Analyzer may include an embedded logic debugging circuit on the local device, where the logic debugging circuit is configured to capture link data based on user-defined events to create a corresponding database of signal capture in a local memory. The Protocol Analyzer is configured to import the database from memory and to decode the link data to display on a user interface that organizes key link sequencing events along with their timestamps to help the user more accurately and quickly debug any link bring-up issues.


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