Semiconductor assemblies with flow controller to mitigate ingression of mold material

Abstract

Semiconductor devices having flow controllers configured to reduce mitigation of mold material between stacked layers, and associated systems and methods, are disclosed herein. In some embodiments, the semiconductor device includes a package substrate that has first and second surfaces. First and second die stacks are formed on the first surface and are adjacent to each other. A portion of the first surface extends between the first and second die stacks. A layer of material is adhered to top surfaces of the first and second die stacks and extends at a distance above the package substrate to form a tunnel between the layer of material, opposing sidewalls of the die stacks, and the package substrate. The semiconductor device further includes a flow controller that is adhered to at least a portion of the first surface inside the tunnel that reduces a cross-sectional surface area of at least a portion of the tunnel.