The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 29, 2022
Filed:
Apr. 04, 2022
Monolithic 3d Inc., Klamath Falls, OR (US);
Zvi Or-Bach, Haifa, IL;
Zeev Wurman, Palo Alto, CA (US);
Monolithic 3D Inc., Klamath Falls, OR (US);
Abstract
A method of designing a 3D Integrated Circuit including: partitioning at least one design into at least a first and a second level, where the first level includes logic and the second level includes memory; then performing a first placement of the second level using a placer executed by a computer, the placer is a part of a Computer Aided Design tool, where the 3D Integrated Circuit includes a plurality of connections between the first level and the second level; and performing a second placement of the first level based on the first placement, where memory includes a first memory array, the logic includes a first logic circuit configured so as to write data to first memory array. Performing the first placement includes placing the first memory array, and where performing the second placement includes placing the first logic circuit based on the first placement of the first memory array.