The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 29, 2022

Filed:

Mar. 25, 2021
Applicant:

Cadence Design Systems, Inc., San Jose, CA (US);

Inventors:

Ahmad S. Abo Foul, Jatt, IL;

Lars Lundgren, Molnlycke, SE;

Björn Håkan Hjort, Gothenburg, SE;

Habeeb Farah, Nazareth, IL;

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/3323 (2020.01);
U.S. Cl.
CPC ...
G06F 30/3323 (2020.01);
Abstract

The present disclosure relates to a system and method for assertion-based formal verification in an electronic design environment. Embodiments may include executing, using a processor, an assertion-based formal verification proof process on a model of an electronic design and analyzing a first property associated with the model. Embodiments may further include generating at least one trace of the first property and determining a mapping function associated with the first property. Embodiments may also include storing the at least one trace and the mapping function. Embodiments may further include determining that a second property associated with the model shares a cone of influence with the first property and generating a new trace based upon, at least in part, the mapping function.


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