The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 22, 2022

Filed:

Jun. 04, 2020
Applicant:

Infineon Technologies Dresden Gmbh & Co. KG, Dresden, DE;

Inventors:

Franz Hirler, Isen, DE;

Christian Fachmann, Fuernitz, AT;

Winfried Kaindl, Unterhaching, DE;

Hans Weber, Bayerisch Gmain, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7813 (2013.01); H01L 29/0634 (2013.01); H01L 29/1095 (2013.01); H01L 29/7827 (2013.01);
Abstract

A semiconductor device includes a semiconductor body having a first surface and second surface opposite to the first surface in a vertical direction, and a plurality of transistor cells at least partly integrated in the semiconductor body. Each transistor cell includes at least two source regions, first and second gate electrodes spaced apart from each other in a first horizontal direction and arranged adjacent to and dielectrically insulated from a continuous body region, a drift region separated from the at least two source regions by the body region, and at least three contact plugs extending from the body region towards a source electrode in the vertical direction. The at least three contact plugs are arranged successively between the first and second gate electrodes. Only the two outermost contact plugs that are arranged closest to the first and second gate electrodes, respectively, directly adjoin at least one of the source regions.


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