The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 22, 2022

Filed:

Mar. 23, 2021
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Fu-Jung Chuang, Kaohsiung, TW;

Tsuo-Wen Lu, Kaohsiung, TW;

Chia-Ming Kuo, Kaohsiung, TW;

Po-Jen Chuang, Kaohsiung, TW;

Chi-Mao Hsu, Tainan, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 29/78 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
H01L 29/6656 (2013.01); H01L 21/02164 (2013.01); H01L 21/02238 (2013.01); H01L 21/02255 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 21/31116 (2013.01);
Abstract

A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a polymer block on a corner between the gate structure and the substrate; performing a cleaning process; performing an oxidation process by injecting oxygen gas under 750° C. to form a first seal layer on sidewalls of the gate structure; and forming a source/drain region adjacent to two sides of the gate structure.


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