The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 22, 2022

Filed:

Jun. 20, 2022
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventor:

Shuai Guo, Hefei, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/108 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10805 (2013.01); H01L 27/10873 (2013.01); H01L 27/10885 (2013.01); H01L 27/10891 (2013.01); H01L 29/7827 (2013.01);
Abstract

The present application provides a semiconductor structure and a manufacturing method thereof, relates to the technical field of semiconductors. The manufacturing method of a semiconductor structure includes: providing a substrate; forming a plurality of laminated structures arranged at intervals on the substrate, the laminated structure includes a first conductive layer, an insulating layer, and a second conductive layer, and at least one of the first conductive layer and the second conductive layer is a semi-metal layer; forming a channel layer covering the laminated structures, and a dielectric layer covering the channel layer; and forming word lines (WLs) extending along a first direction, the WL includes a plurality of contact parts and a connecting part connecting adjacent contact parts, the contact part surrounds and is in contact with a side surface of the dielectric layer, and the contact part is opposite to at least a part of the insulating layer.


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