The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 22, 2022
Filed:
Aug. 30, 2019
Nxp B.v., Eindhoven, NL;
Leo van Gemert, Nijmegen, NL;
Jeroen Johannes Maria Zaal, Nijmegen, NL;
Michiel van Soestbergen, Wageningen, NL;
Romuald Olivier Nicolas Roucou, Arnhem, NL;
NXP B.V., Eindhoven, NL;
Abstract
A structure is provided that reduces the stress generated in a semiconductor device package during cooling subsequent to solder reflow operations for coupling semiconductor devices to a printed circuit board (PCB). Stress reduction is provided by coupling solder lands to metal-layer structures using traces on the PCB that are oriented approximately perpendicular to lines from an expansion neutral point associated with the package. In many cases, especially where the distribution of solder lands of the semiconductor device package are uniform, the expansion neutral point is in the center of the semiconductor device package. PCB traces having such an orientation experience reduced stress due to thermal-induced expansion and contraction as compared to traces having an orientation along a line to the expansion neutral point.