The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 15, 2022

Filed:

May. 02, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Anil Vasudevan, Portland, OR (US);

Parthasarathy Sarangam, Portland, OR (US);

Eric Mann, Hillsboro, OR (US);

Daniel Cohn, Oakland, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 1/00 (2006.01); H04L 45/74 (2022.01); H04L 47/11 (2022.01); H04L 47/52 (2022.01); H04L 47/50 (2022.01); H04L 45/00 (2022.01);
U.S. Cl.
CPC ...
H04L 45/74 (2013.01); H04L 45/38 (2013.01); H04L 47/115 (2013.01); H04L 47/52 (2013.01); H04L 47/54 (2013.01);
Abstract

Devices and techniques for reorder resilient transport are described herein. A device may store data packets in sequential positions of a flow queue in an order in which the data packets were received. The device may retrieve a first data packet from a first sequential position and a second data packet from a second sequential position that is next in sequence to the first sequential position in the flow queue. The device may store the first data packet and the second data packet in a buffer and refrain from providing the first data packet and the second data packet to upper layer circuitry if the packet order information for the first data packet and the second data packet indicate that the first data packet and the second data packet were received out of order. Other embodiments are also described.


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