The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 08, 2022

Filed:

Aug. 07, 2020
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Huiyuan Wang, Santa Clara, CA (US);

Rick Kustra, San Jose, CA (US);

Bo Qi, San Jose, CA (US);

Abhijit Basu Mallick, Fremont, CA (US);

Kaushik Alayavalli, Sunnyvale, CA (US);

Jay D. Pinson, San Jose, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); C23C 16/32 (2006.01); C23C 16/50 (2006.01); C23C 16/34 (2006.01); C23C 16/36 (2006.01); C23C 16/40 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02205 (2013.01); C23C 16/32 (2013.01); C23C 16/342 (2013.01); C23C 16/345 (2013.01); C23C 16/36 (2013.01); C23C 16/401 (2013.01); C23C 16/50 (2013.01); H01L 21/0262 (2013.01); H01L 21/02274 (2013.01); H01L 21/0217 (2013.01); H01L 21/02112 (2013.01); H01L 21/02129 (2013.01); H01L 21/02208 (2013.01); H01L 21/02532 (2013.01); H01L 21/02579 (2013.01);
Abstract

Examples of the present technology include semiconductor processing methods to form boron-containing materials on substrates. Exemplary processing methods may include delivering a deposition precursor that includes a boron-containing precursor to a processing region of a semiconductor processing chamber. A plasma may be formed from the deposition precursor within the processing region of the semiconductor processing chamber. The methods may further include depositing a boron-containing material on a substrate disposed within the processing region of the semiconductor processing chamber, where the substrate is characterized by a temperature of less than or about 50° C. The as-deposited boron-containing material may be characterized by a surface roughness of less than or about 2 nm, and a stress level of less-than or about −500 MPa. In some embodiments, a layer of the boron-containing material may function as a hardmask.


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