The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 01, 2022

Filed:

Jan. 24, 2020
Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventors:

Seyhan Karakulak, San Diego, CA (US);

Anthony Dwayne Weathers, San Diego, CA (US);

Richard David Barndt, San Diego, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/26 (2006.01); G11C 16/34 (2006.01); G06F 11/07 (2006.01); G11C 11/56 (2006.01);
U.S. Cl.
CPC ...
G11C 16/26 (2013.01); G06F 11/073 (2013.01); G06F 11/076 (2013.01); G11C 11/5642 (2013.01); G11C 16/3427 (2013.01); G11C 16/3495 (2013.01);
Abstract

After a predetermined period of time in a life cycle of a flash memory device, a plurality of reliability values corresponding to a plurality of reads of one or more of the plurality of memory cells are generated; each of the reads using a variation of a predetermined read level voltage. An offset voltage is then identified, offset from the read level voltage. The offset voltage corresponds to a zero crossing point in the range of the reliability values. Once the offset voltage is identified, the read level voltage is set to a calibrated voltage based on the offset voltage.


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