The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 01, 2022
Filed:
Dec. 24, 2014
Cadence Design Systems, Inc., San Jose, CA (US);
Andrew Wilmot, Carlisle, MA (US);
Neeti Khullar Bhatnagar, San Jose, CA (US);
Qizhang Chao, Palo Alto, CA (US);
George Franklin Frazier, Lawrence, KS (US);
CADENCE DESIGN SYSTEMS, INC., San Jose, CA (US);
Abstract
According to an embodiment, a system and method are provided for constructing an accurate view of memory and events on a simulation platform. The system memory view can be used with a debug and analysis tool to provide post-processing debug, including searching forward and backward in capture time of the stored memory view to analyze the events of the simulation. The memory is constructed by capturing and storing each memory execution transaction, bus transaction, and register transaction during simulation. Changes in simulation platform hardware state may also be captured and stored in a hardware state database, including switches between process threads detected during the simulation that may update a simulator register. The captured events provide observability into the OS processes, the hardware, and the embedded software of the simulation platform.