The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 25, 2022
Filed:
Dec. 12, 2018
Applicant:
Siltronic Ag, Munich, DE;
Inventors:
Norbert Werner, Tengling, DE;
Christian Hager, Kastl, DE;
Assignee:
SILTRONIC AG, Munich, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/16 (2006.01); C23C 16/458 (2006.01); C30B 29/06 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 29/16 (2013.01); C23C 16/4585 (2013.01); C30B 29/06 (2013.01); H01L 21/02381 (2013.01); H01L 21/02532 (2013.01);
Abstract
A semiconductor wafer of monocrystalline silicon. The semiconductor wafer having: a substrate wafer of monocrystalline silicon; and a layer of monocrystalline silicon that lies on a front side of the substrate wafer. The substrate wafer has a crystal orientation. An averaged front side-based ZDD of the semiconductor wafer, with a division of a surface of an epitaxial layer into 16 sectors and an edge exclusion of 1 mm, is not less than −30 nm/mmand not more than 0 nm/mm. An ESFQRof the semiconductor wafer, with an edge exclusion of 1 mm and 72 sectors each with a length of 30 mm, is at most 10 nm.