The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 25, 2022

Filed:

Mar. 04, 2021
Applicant:

Sandisk Technologies Llc, Addison, TX (US);

Inventors:

Abhijith Prakash, Milpitas, CA (US);

Anubhav Khandelwal, San Jose, CA (US);

Assignee:

SanDisk Technologies LLC, Addison, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G11C 16/06 (2006.01); G11C 11/56 (2006.01); G11C 16/34 (2006.01); G11C 16/28 (2006.01); G11C 16/10 (2006.01); G11C 16/30 (2006.01); G11C 16/26 (2006.01); G11C 16/08 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3459 (2013.01); G11C 16/08 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01); G11C 16/30 (2013.01); G11C 16/3404 (2013.01);
Abstract

A memory apparatus and method of operation are provided. The apparatus includes a plurality of memory cells. Each of the plurality of memory cells is connected to one of a plurality of word lines and is arranged in one of a plurality of blocks. Each of the plurality of memory cells is configured to retain a threshold voltage corresponding to one of a plurality of data states. A control circuit is coupled to the plurality of word lines and is configured to detect at least one use characteristic of the memory apparatus. The control circuit adjusts a verify voltage level by one of a plurality of verify level offsets based on the at least one use characteristic that is detected. The verify voltage level is applied to the one of the plurality of word lines selected for programming following an application of a program voltage during a program operation.


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