The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 25, 2022

Filed:

Apr. 13, 2021
Applicant:

Nxp Usa, Inc., Austin, TX (US);

Inventors:

Jean-Philippe Meunier, Ayguesvives, FR;

Maxime Clairet, Labastidette, FR;

Guillaume Jean Founaud, Saint-Orens de Gameville, FR;

Alaa Eldin Y El Sherif, Plano, TX (US);

Assignee:

NXP USA, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/14 (2006.01); G06F 13/40 (2006.01); G06F 11/07 (2006.01); G06F 1/30 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1441 (2013.01); G06F 1/30 (2013.01); G06F 11/0736 (2013.01); G06F 11/0751 (2013.01); G06F 11/0772 (2013.01); G06F 11/0778 (2013.01); G06F 11/0784 (2013.01); G06F 11/0787 (2013.01); G06F 13/4068 (2013.01); G06F 2201/805 (2013.01);
Abstract

Various embodiments relate to a distributed power system, including: a primary power management integrated circuit (PMIC) configured to receive a source voltage and connected to a primary communication bus, wherein the primary PMIC produces a secondary voltage on a voltage line, wherein the primary PMIC communicates with a microcontroller unit (MCU) via the primary communication bus; and a plurality of secondary PMICs connected to the primary PMIC via the voltage line, a secondary communication bus, and a fail line, wherein the plurality of secondary PMICs are configured to produce a pulsed signal on the fail line when a secondary PMIC fails, wherein the pulsed signal produced by each of the plurality of secondary PMICs have a unique pulse width that indicates to the primary PMIC the identity of the failed secondary PMIC.


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