The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 18, 2022

Filed:

Oct. 10, 2019
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Atsugi, JP;

Inventors:

Tatsuya Onuki, Kanagawa, JP;

Yuto Yakubo, Kanagawa, JP;

Kiyoshi Kato, Kanagawa, JP;

Seiya Saito, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/00 (2006.01); H03M 1/12 (2006.01); G01D 21/00 (2006.01); G11C 27/02 (2006.01);
U.S. Cl.
CPC ...
H03M 1/1245 (2013.01); G01D 21/00 (2013.01); G11C 27/02 (2013.01);
Abstract

A semiconductor device with a novel structure is provided. The semiconductor device includes a sensor, an amplifier circuit to which a sensor signal of the sensor is input, a sample-and-hold circuit that retains a voltage corresponding to an output signal of an amplifier input to the sample-and-hold circuit, an analog-to-digital converter circuit to which an output signal of the sample-and-hold circuit corresponding to the voltage is input, and an interface circuit. The interface circuit has a function of switching and controlling a first control period in which the sensor signal is input to the amplifier circuit and an output signal of the amplifier circuit is retained in the sample-and-hold circuit and a second control period in which a digital signal obtained by output of the voltage retained in the sample-and-hold circuit to the analog-to-digital converter circuit is output to the interface circuit. In the first control period, the analog-to-digital converter circuit is switched to stop output of the digital signal. The first control period is longer than the second control period.


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