The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 18, 2022
Filed:
Dec. 30, 2016
Intel Corporation, Santa Clara, CA (US);
Balijeet S. Bains, Portland, OR (US);
Charles H. Wallace, Portland, OR (US);
Zhanping Chen, Hillsboro, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Embodiments herein describe techniques for fuse lines and plugs formation. A semiconductor device may include a fuse line having a nominal fuse segment abutted to a necked fuse segment. The nominal fuse segment may be wider than the necked fuse segment. A first spacer may be along a first side of the fuse line and a second spacer along a second side opposite to the first side of the fuse line. The first spacer may include a part having a width at least twice a width of a part of the second spacer. A plug within a vicinity of the necked fuse segment may have a plug width that may be at least twice a plug with of a plug of an interconnect line outside the vicinity. Other embodiments may also be described and claimed.