The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 18, 2022

Filed:

Sep. 25, 2019
Applicant:

Synopsys, Inc., Mountain View, CA (US);

Inventors:

Olivier Coudert, Mountain View, CA (US);

Florent Duru, Marlborough, MA (US);

Francois Peneloux, Marlborough, MA (US);

Assignee:

Synopsys, Inc., Mountain View, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/455 (2018.01); G06F 30/367 (2020.01); G06F 119/18 (2020.01); G06F 30/333 (2020.01);
U.S. Cl.
CPC ...
G06F 30/367 (2020.01); G06F 30/333 (2020.01); G06F 2119/18 (2020.01);
Abstract

A circuit hardware emulation module is configured to identify oscillating subgraphs of an emulated graph, or to identify state-holding subgraphs of an emulated graph. The emulation module identifies one or more loops within an emulated circuit; generates an acyclic emulation of at least a portion of the emulated circuit, wherein the acyclic emulation is characterized by one or more loop breakers; generates a loop detector emulation of a hardware-based loop detector circuit based at least in part on a quantity of loop breakers n characterizing the acyclic emulation, wherein the loop detector emulation comprises at least one of an oscillation detector or a state-holding detector; and executes the loop detector emulation for a plurality of input values for the emulated circuit to generate an output indicating at least one of an oscillation status or a state-holding status of the emulated circuit.


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