The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 11, 2022

Filed:

Jul. 17, 2020
Applicant:

Kioxia Corporation, Minato-ku, JP;

Inventors:

Shigeru Kinoshita, Yokohama, JP;

Shusaku Matsumoto, Saitama, JP;

Koichiro Kawano, Yokohama, JP;

Hiroshi Fujita, Yokohama, JP;

Yoshinori Kitamura, Tsu, JP;

Assignee:

Kioxia Corporation, Minato-ku, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/677 (2006.01); H01L 21/673 (2006.01); H01L 21/67 (2006.01); B08B 3/10 (2006.01); B08B 3/08 (2006.01); B08B 13/00 (2006.01);
U.S. Cl.
CPC ...
H01L 21/67757 (2013.01); B08B 3/08 (2013.01); B08B 3/102 (2013.01); B08B 13/00 (2013.01); H01L 21/67057 (2013.01); H01L 21/67086 (2013.01); H01L 21/67326 (2013.01);
Abstract

A substrate processing device according to the present embodiment includes a processing tank configured to be capable of accumulating a liquid. A conveyer can array a plurality of semiconductor substrates in such a manner that front surfaces of the semiconductor substrates face a substantially horizontal direction, and transport the semiconductor substrates into the processing tank. A plurality of liquid suppliers can supply the liquid toward an inside of the processing tank from a lower portion of the processing tank. A plurality of current plates are arranged on at least either one end side or the other end side of an array of the semiconductor substrates. The current plates are provided in a first gap region above the semiconductor substrates in gaps between the conveyer and a sidewall of the processing tank on both sides of the conveyer as viewed from an array direction of the semiconductor substrates.


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