The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 11, 2022

Filed:

Nov. 25, 2020
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Robert W. Strong, Folsom, CA (US);

Dustin J. Carter, Placerville, CA (US);

Neil Levine, Davis, CA (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/57 (2013.01); H04L 9/32 (2006.01); G06F 9/4401 (2018.01); G06F 8/60 (2018.01); G06F 9/30 (2018.01); G06F 1/26 (2006.01);
U.S. Cl.
CPC ...
G06F 21/575 (2013.01); G06F 1/26 (2013.01); G06F 8/60 (2013.01); G06F 9/30003 (2013.01); G06F 9/441 (2013.01); H04L 9/3249 (2013.01);
Abstract

A variety of applications can include apparatus and/or methods of controlling a secure boot mode for a memory system. In an embodiment, a system includes a memory component and a processing device, where the processing device is configured to control a boot process for the system to operate the memory component and perform a cryptographic verification with a host to conduct an authentication of the host. The processing device can interact with the host, in response to the authentication, to receive a setting to control the boot process in a secure boot mode. The processing can interact with another processing device of the system to store the setting and to receive a secure boot signal from the other processing device, where the secure boot signal is a signal to assert or de-assert the secure boot mode depending on a value of the setting. Additional apparatus, systems, and methods are disclosed.


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