The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 11, 2022
Filed:
Nov. 16, 2016
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventor:
Mohammad Abdallah, El Dorado Hills, CA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 9/455 (2018.01); G06F 12/0875 (2016.01); G06F 15/80 (2006.01);
U.S. Cl.
CPC ...
G06F 9/30174 (2013.01); G06F 9/30018 (2013.01); G06F 9/30021 (2013.01); G06F 9/30029 (2013.01); G06F 9/30098 (2013.01); G06F 9/30189 (2013.01); G06F 9/3802 (2013.01); G06F 9/3814 (2013.01); G06F 9/3842 (2013.01); G06F 9/3844 (2013.01); G06F 9/3857 (2013.01); G06F 9/3861 (2013.01); G06F 9/3863 (2013.01); G06F 9/3867 (2013.01); G06F 9/3879 (2013.01); G06F 9/45516 (2013.01); G06F 12/0875 (2013.01); G06F 15/8007 (2013.01); G06F 2212/452 (2013.01);
Abstract
A method for supporting architecture speculation in an out of order processor is disclosed. The method comprises fetching two threads into the processor, wherein a first thread executes in a speculative state and a second thread executes in a non-speculative state. The method also comprises enabling a speculative scope for an execution of the first thread and a non-speculative scope for an execution of the second thread in an architecture of the processor, wherein the speculative scope and the non-speculative scope can both be fetched into the architecture and be present concurrently.