The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 27, 2022

Filed:

Jul. 26, 2020
Applicants:

Champion Microelectronic Corp., Hsinchu, TW;

Yutechnix, Inc., Saratoga, CA (US);

Inventors:

Haiping Dun, Fremont, CA (US);

Hung-Chen Lin, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/872 (2006.01); H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 29/70 (2006.01);
U.S. Cl.
CPC ...
H01L 29/8725 (2013.01); H01L 29/0692 (2013.01); H01L 29/70 (2013.01); H01L 29/7806 (2013.01); H01L 29/7813 (2013.01);
Abstract

Apparatus and other embodiments associated with high speed and high breakdown voltage MOS rectifier are disclosed. A Junction All Around structure, where a deep trench structure surrounds and encloses a P-N junction or a MOS structure, is created and applied in various rectifiers. In one embodiment, multiple deep trenches in concentric ring circles enclosed several horizontal P-N junctions in concentric ring circles. In another embodiment, an enclosed deep trench in ring circle surrounds a horizontal P-N junction, which results in a planar N-channel MOS during forward bias. This structure can be extended to multiple deep trenches with associated horizontal P-N junctions.


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