The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 27, 2022

Filed:

Jul. 06, 2020
Applicant:

Globalfoundries U.s. Inc., Santa Clara, CA (US);

Inventors:

Jagar Singh, Clifton Park, NY (US);

Sudarshan Narayanan, San Jose, CA (US);

Wang Zheng, Ballston Lake, NY (US);

Assignee:

GlobalFoundries U.S. Inc., Malta, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/423 (2006.01); H01L 29/06 (2006.01); H01L 29/40 (2006.01); H01L 29/49 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7851 (2013.01); H01L 29/0653 (2013.01); H01L 29/402 (2013.01); H01L 29/42368 (2013.01); H01L 29/42376 (2013.01); H01L 29/4983 (2013.01); H01L 29/66681 (2013.01); H01L 29/66795 (2013.01); H01L 29/7816 (2013.01);
Abstract

A structure includes a semiconductor fin; a first source/drain region and a second source/drain region in the semiconductor fin; a first doping region about the first source/drain region, defining a channel region in the semiconductor fin; and a second doping region about the second source/drain region, defining a drain extension in the semiconductor fin. A gate structure is over the channel region and the drain extension. The gate structure includes a gate dielectric layer, a first metal layer adjacent a second metal layer over the gate dielectric layer, and a contiguous gate conductor over the first metal layer and the second metal layer. One of the metal layers is over the channel region and the other is over the drain extension. The metal layers may have different thicknesses and/or work functions, to improve transconductance and RF performance of an LDMOS FinFET including the structure.


Find Patent Forward Citations

Loading…