The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 27, 2022
Filed:
Apr. 23, 2020
Applicant:
United Microelectronics Corp., Hsin-Chu, TW;
Inventors:
Jia-Rong Wu, Kaohsiung, TW;
I-Fan Chang, Hsinchu, TW;
Rai-Min Huang, Taipei, TW;
Ya-Huei Tsai, Tainan, TW;
Yu-Ping Wang, Hsinchu, TW;
Assignee:
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 43/02 (2006.01); H01L 27/22 (2006.01); G11C 11/16 (2006.01); H01F 10/32 (2006.01); H01F 41/34 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 43/12 (2006.01); H01L 43/10 (2006.01);
U.S. Cl.
CPC ...
H01L 27/222 (2013.01); G11C 11/161 (2013.01); H01F 10/3254 (2013.01); H01F 41/34 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 43/02 (2013.01); H01L 43/12 (2013.01); H01L 43/10 (2013.01);
Abstract
A method for fabricating semiconductor device includes the steps of: providing a substrate having a logic region and a magnetoresistive random access memory (MRAM) region, forming a magnetic tunneling junction (MTJ) on the MRAM region, forming a metal interconnection on the MTJ, forming a dielectric layer on the metal interconnection, patterning the dielectric layer to form openings, and forming the blocking layer on the patterned dielectric layer and the metal interconnection and into the openings.