The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 27, 2022

Filed:

Dec. 10, 2020
Applicant:

Macronix International Co., Ltd., Hsinchu, TW;

Inventors:

Chun-Lien Su, Taichung, TW;

Chun-Hsiung Hung, Hsinchu, TW;

Shuo-Nan Hung, Hsinchu County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/0882 (2016.01); G06F 11/10 (2006.01); G06F 12/02 (2006.01); G06F 12/0862 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0882 (2013.01); G06F 11/1068 (2013.01); G06F 12/0246 (2013.01); G06F 12/0862 (2013.01);
Abstract

A flash memory system and a flash memory thereof are provided. The flash memory device includes a NAND flash memory and a control circuit. The NAND flash memory chip includes a cache memory, a page buffer; and an NAND flash memory array. The NAND flash memory array includes a plurality of pages, wherein each page includes a plurality of sub-pages, each sub-page has a sub-page length. The cache memory is composed of a plurality of sub cache and each sub cache corresponds to different pages of the NAND flash memory array. The page buffer is composed of a plurality of sub-page buffers and each sub-page buffer corresponds to different pages of the NAND flash memory array. The control circuit is coupled to the host and the NAND flash memory, and performs an access operation in units of one sub-page.


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