The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 27, 2022

Filed:

Nov. 10, 2017
Applicant:

Shin-etsu Handotai Co., Ltd., Tokyo, JP;

Inventors:

Yuki Tanaka, Nishigo-mura, JP;

Daichi Kitazume, Nishigo-mura, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
B24B 37/08 (2012.01); B24B 37/28 (2012.01); H01L 21/304 (2006.01); H01L 21/67 (2006.01);
U.S. Cl.
CPC ...
B24B 37/08 (2013.01); B24B 37/28 (2013.01); H01L 21/304 (2013.01); H01L 21/67092 (2013.01);
Abstract

A carrier for a double-side polishing apparatus configured to double-side polish providing a semiconductor silicon wafer. The carrier being disposed between upper and lower turn tables have a polishing pad attached, and includes a holding hole formed to hold the semiconductor silicon wafer between the upper and lower turn tables during polishing. The carrier for a double-side polishing apparatus is made of a resin. An average contact angle with pure water of front and back surfaces of the carrier, which come into contact with the polishing pads, is 45° or more and 60° or less, and a difference in average contact angles between the front surface and the back surface is 5° or less, which provides a carrier for a double-side polishing apparatus capable of enhancing the polishing rate for a semiconductor silicon wafer by using a resinous carrier; and a double-side polishing apparatus and method which employ the carrier.


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