The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 20, 2022
Filed:
Jul. 30, 2021
Kepler Computing Inc., San Francisco, CA (US);
Sasikanth Manipatruni, Portland, OR (US);
Yuan-Sheng Fang, Oakland, CA (US);
Robert Menezes, Portland, OR (US);
Rajeev Kumar Dokania, Beaverton, OR (US);
Ramamoorthy Ramesh, Moraga, CA (US);
Amrita Mathuriya, Portland, OR (US);
Kepler Computing Inc., San Francisco, CA (US);
Abstract
A low power sequential circuit (e.g., latch) uses a non-linear polar capacitor to retain charge with fewer transistors than traditional CMOS sequential circuits. The sequential circuit includes a 3-input majority gate having first, second, and third inputs, and a first output. The sequential circuit includes a driver coupled to the first output, wherein the driver is to generate a second output. The sequential circuit further includes an exclusive-OR (XOR) gate to receive a clock and the second output, wherein the XOR gate is to generate a third output which couples to the second input, where the first input is to receive a data, and wherein the third input is to receive the second output.