The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 2022

Filed:

Sep. 25, 2020
Applicant:

Stats Chippac Pte. Ltd., Singapore, SG;

Inventors:

YoungCheol Kim, Gyeonggi-do, KR;

ChoonHeung Lee, Singapore, SG;

WonGyou Kim, Gyeonggi-do, KR;

Assignee:

STATS ChipPAC Pte. Ltd., Singapore, SG;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/522 (2006.01); H01L 23/552 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 21/48 (2006.01); H01L 23/49 (2006.01);
U.S. Cl.
CPC ...
H01L 23/552 (2013.01); H01L 21/4853 (2013.01); H01L 21/4889 (2013.01); H01L 21/565 (2013.01); H01L 23/3121 (2013.01); H01L 23/49 (2013.01); H01L 23/49838 (2013.01); H01L 24/16 (2013.01); H01L 2224/16227 (2013.01); H01L 2924/3025 (2013.01);
Abstract

A semiconductor device has a substrate and a plurality of bond wires is disposed in a pattern across on the substrate. The pattern of bond wires can be a plurality of rows of bond wires. A plurality of electrical components is disposed over the substrate as an SIP module. An encapsulant is deposited over the substrate, electrical components, and bond wire. An opening is formed in the encapsulant extending to the bond wire. The opening can be a trench extending across the bond wires disposed on the substrate, or a plurality of openings individually exposing each of a plurality of bond wires. A conductive material is disposed in the opening. A shielding layer is formed over the encapsulant and in contact with the conductive material. The shielding layer, conductive material, and bond wires reduce the effects of EMI, RFI, and other inter-device interference.


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