The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 2022

Filed:

Oct. 30, 2020
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Ming-Da Cheng, Taoyuan, TW;

Tzy-Kuang Lee, Hsinchu, TW;

Song-Bor Lee, Zhubei, TW;

Wen-Hsiung Lu, Tainan, TW;

Po-Hao Tsai, Zhongli, TW;

Wen-Che Chang, Taichung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76885 (2013.01); H01L 21/76802 (2013.01); H01L 21/76852 (2013.01); H01L 21/76871 (2013.01); H01L 24/05 (2013.01); H01L 24/13 (2013.01); H01L 24/32 (2013.01); H01L 2224/0231 (2013.01); H01L 2224/0235 (2013.01); H01L 2224/0239 (2013.01); H01L 2224/02331 (2013.01); H01L 2224/0391 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05008 (2013.01); H01L 2224/05022 (2013.01);
Abstract

A method includes forming a first conductive feature, depositing a passivation layer on a sidewall and a top surface of the first conductive feature, etching the passivation layer to reveal the first conductive feature, and recessing a first top surface of the passivation layer to form a step. The step comprises a second top surface of the passivation layer. The method further includes forming a planarization layer on the passivation layer, and forming a second conductive feature extending into the passivation layer to contact the first conductive feature.


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