The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 06, 2022

Filed:

Sep. 29, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Utsaw Kumar, Sunnyvale, CA (US);

Debdeep Chatterjee, San Jose, CA (US);

Seunghee Han, San Jose, CA (US);

Ralf Matthias Bendlin, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04W 72/00 (2009.01); H04W 76/10 (2018.01); H04L 5/00 (2006.01);
U.S. Cl.
CPC ...
H04W 72/005 (2013.01); H04L 5/0053 (2013.01); H04W 76/10 (2018.02);
Abstract

Devices and methods of enhancing narrowband communications are generally described. NPSS and NSSS are modulated to include an additional bit that indicates a duplexing scheme, a raster frequency offset (zero or non-zero), an operating mode (in-band or standalone/guard-band) or frame timing used by the eNB. The NPSS modulation uses conjugate ZC sequences multiplied by a cover code for each OFDM symbol. The NMIB may provide additional information related to the operating mode or offset. NSSS cyclic shifts may be used to indicate the offset or TDD/FDD use, as may relative locations of the NPSS and NSSS. The NSSS may use symbol-level modulation and time domain cyclic shifts to indicate the frame timing.


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